EP7209 Datasheet, PDF (1/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
EP7209
FEATURES
s Audio decoder system-on-chip
— Allows for support of multiple audio decompression
algorithms
— Supports MPEG 1, 2, & 2.5 layer 3 audio decoding,
including ISO compliant MPEG 1 & 2 layer 3 support for
all standard sample rates and bit rates
— Supports bit streams with adaptive bit rates
— DAI (Digital Audio Interface) providing glueless interface
to low power DACs, ADCs, and Codecs
s Ultra low power consumption for MP3 playback
— 87 mW (typical) for 44.1 kHz samples/sec,
128 kbits/second
— 50 mW for 22.05 kHz samples/sec, 64 kbits/second
— <1 mW in Standby State
s ARM720T processor
— ARM7TDMI CPU
— 8 kbytes of four-way set-associative cache
— MMU with 64-entry TLB (transition look-aside buffer)
— Write Buffer
— Windows^® CE enabled
— Thumb code support enabled
(cont.)
Ultra-Low-Power Audio Decoder
System-on-Chip
OVERVIEW
The EP7209 is a complete integrated system on a
chip for enabling personal digital audio solutions. It
is designed specifically for implementing audio
processing algorithms in power sensitive applica-
tions. The core-logic functionality of the device is
built around an ARM720T embedded processor.
The EP7209 also includes a 32-bit Y2K-compliant
Real-Time Clock (RTC) and comparator.
(cont.)
Functional Block Diagram
13-MHZ INPUT
3.6864 MHZ
PLL
32.768 KHZ
NPOR, RUN,
RESET, WAKEUP
BATOK, NEXTPWR
PWRFL, BATCHG
EINT[1:3], FIQ,
MEDCHG
FLASHING LED DRIVE
PORTS A, B, D (8-BIT)
PORT E (3-BIT)
KEYBD DRIVERS (0:7)
BUZZER DRIVE
DC-TO-DC
ADCCLK, ADCIN,
ADCOUT, SMPCLK,
ADCCS
SSICLK, SSITXFR,
SSITXDA, SSIRXDA,
SSIRSFR
32.768-KHZ
OSCILLATOR
STATE CONTROL
POWER
MANAGEMENT
INTERRUPT
CONTROLLER
RTC
GPIO
PWM
SSI1 (ADC)
DAI
SSI2
CODEC
ARM720T
ARM7TDMI
CPU CORE
8-KBYTE
CACHE
MMU
WRITE
BUFFER
TIMER
COUNTERS (2)
ON-CHIP
BOOT ROM
INTERNAL DATA BUS
MEMORY CONTROLLER
CL-PS6700
INTFC.
EXPANSION
CONTROL
INTERNAL ADDRESS BUS
LCD
DMA
ICE-JTAG
LCD
CONTROLLER
ON-CHIP SRAM
38,400 BYTES
IrDA
EPB BRIDGE
EPB BUS
UART1
UART2
D[0:31]
PB[0:1], NCS[4:5]
EXPCLK, WORD, NCS[0:3],
EXPRDY, WRITE
A[0:27],
DRA[0:12]
TEST AND
DEVELOPMENT
LCD DRIVE
LED AND
PHOTODIODE
ASYNC
INTERFACE 1
ASYNC
INTERFACE 2
P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 1999
(All Rights Reserved)
DEC ‘99
DS453PP2
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