EP7209 Datasheet, PDF (14/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
Function
Interrupts
Power
Management
State Control
DAI, Codec or
SSI2
Interface
(See Table 5 for
SSI2/Codec/DAI
Pin Multiplexing)
Signal
Name
nMEDCHG/
nBROM
nEXTFIQ
EINT[3]
nEINT[1:2]
nPWRFL¹
BATOK¹
nEXTPWR
nBATCHG¹
nPOR
Signal
Description
Media changed input; active low, deglitched. Used as a general purpose FIQ
I
interrupt during normal operation. It is also used on power up to configure the
processor to either boot from the internal Boot ROM, or from external memory.
When low, the chip will boot from the internal Boot ROM.
I External active low fast interrupt request input
I External active high interrupt request input
I Two general purpose, active low interrupt inputs
I
Power fail input; active low, deglitched input to force system into the Standby
State
I
Main battery OK input; falling edge generates a FIQ, a low level in the Standby
State inhibits system start up; deglitched input
I
External power sense; must be driven low if the system is powered by an
external source
I
New battery sense; driven low if battery voltage falls below the "no-battery"
threshold; it is a deglitched input
Power-on reset input. This signal is not deglitched. When active it completely
resets the entire system, including all the RTC registers. Upon power-up, the
signal must be held active low for a minimum of 100 µsec after Vdd has set-
tled. During normal operation, nPOR needs to be held low for at least one
I
clock cycle of the selected clock speed (i.e., when running at 13 MHz, the
pulse width of nPOR needs to be > 77 nsec).
RUN/CLKEN
WAKEUP¹
nURESET¹
SSICLK
SSITXFR
SSITXDA
SSIRXDA
Note that nURESET, RUN/CLKEN, TEST(0), TEST(1), PE(0), PE(1), PE(2),
DRIVE(0), DRIVE(1), DD(0), DD(1), DD(2), and DD(3) are all latched on rising
edge of nPOR.
This pin is programmed to either output the RUN signal or the CLKEN signal.
The CLKENSL bit is used to configure this pin. When RUN is selected, the pin
I/O will be high when the system is active or idle, low while in the Standby State.
When CLKEN is selected, the pin will only be driven low when in the Standby
State (For RUN, see Table 6).
Wake up deglitched input signal; rising edge forces system into the Operating
State from the Standby State; active after an nPOR reset. The wakeup signal
I
can not be used to exit Idle, only Standby. Wakeup must wait at least 2 sec-
onds before it goes high for it to be detected by the CPU. It must also be held
high for at least 125 µsec to guarantee its detection. Toggling wakeup after its
first detection has no effect (i.e., it is ignored).
User reset input; active low deglitched input from user reset button.
I
This pin is also latched upon the rising edge of nPOR and read along with the
input pins nTEST[0:1] to force the device into special test modes. nURESET
does not reset the RTC.
I/O DAI/Codec/SSI2 clock signal
I/O DAI/Codec/SSI2 serial data output frame/synchronization pulse output
O DAI/Codec/SSI2 serial data output
I ^{DAI/Codec/SSI2 serial data input}
SSIRXFR
I/O
SSI2 serial data input frame/synchronization pulse
DAI external clock input
Table 4. External Signal Functions (cont.)
14
DS453PP2