EP7209 Datasheet, PDF (16/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
Function
Boundary
Scan
Test
Oscillators
No connects
Signal
Name
TDI
TDO
TMS
TCLK
nTRST
nTEST[0:1]
MOSCIN
MOSCOUT
Signal
Description
I JTAG data in
O JTAG data out
I JTAG mode select
I JTAG clock
I JTAG async reset
I
Test mode select inputs. These pins are used in conjunction with the power-on
latched state of nURESET to select between the various device test models.
I Main 3.6864 MHz oscillator for 18.432 MHz–73.728 MHz PLL
O
RTCIN
RTCOUT
N/C
I Real Time Clock 32.768 kHz oscillator
O
No connects should be left as no connects; do not connect to ground
Table 4. External Signal Functions (cont.)
1. All deglitched inputs are via the 16.384 kHz clock. Each deglitched signal must be held active for at least two clock periods. Therefore, the
input signal must be active for at least ~125 µs to be detected cleanly.
NOTE: The RTC crystal must be populated for the device to function properly.
2.2.2 SSI/Codec/DAI Pin Multiplexing
SSI2
Codec
SSICLK
PCMCLK
SSITXFR
PCMSYNC
SSITXDA
PCMOUT
SSIRXDA
PCMIN
SSIRXFR
p/u*
* p/u = use an ~10 k pull-up
DAI
SCLK
LRCK
SDOUT
SDIN
MCLK
Direction
I/O
I/O
Output
Input
I/O
Strength
1
1
1
1
The selection between SSI2 and the codec is controlled by the state of the SERSEL bit in SYSCON2 (See
SYSCON2 System Control Register 2). The choice between the SSI2, codec, and the DAI is controlled by
the DAISEL bit in SYSCON3 (See SYSCON3 System Control Register 3).
Table 5. SSI/Codec/DAI Pin Multiplexing
16
DS453PP2