EP7209 Datasheet, PDF (17/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
2.2.3 Output Bi-Directional Pins
RUN
Drive [0:1]
DD[3:0]
The RUN pin is looped back in to skew the address and data bus from each other.
Drive 0 and 1 are looped back in on power up to determine what polarity the output of the PWM should be
when active.
DD[3:0] are looped back in on power up to enable the reading of the ID of some LCD modules.
NOTE:
The above output pins are implemented as bi-directional pins to enable the output side of the pad to
be monitored and hence provide more accurate control of timing or duration:
Table 6. Output Bi-Directional Pins
DS453PP2
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