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EP7209 Datasheet, PDF (35/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip
EP7209
these pins. When the DAISEL bit is set high, the
DAI interface is connected to the external pins. On
power up, both the DAISEL and SERSEL bits are
reset low, thus the master/slave SSI2 will be con-
nected to these pins (and configured for slave mode
operation to avoid external drive clashes).
Table 20 contains pin definition information for the
three multiplexed interfaces.
The internal names given to each of the three inter-
faces are unique to help differentiate them from
each other. The sections below that describe each
of the three interfaces will use their respective
unique internal pin names for clarity.
Type
SPI/Microwire 1
SPI/Microwire 2
DAI Interface
Codec Interface
Comments
Master mode only
Master/slave mode
CD quality DACs and ADCs
Only for use in the PLL clock mode
Referred To As
ADC Interface
SSI2 Interface
DAI Interface
Codec Interface
Table 19. Serial Interface Options
Max. Transfer Speed
128 kbits/s
512 kbits/s
1.536 Mbits/s
64 kbits/s
Pin
No.
LQFP
63
65
66
67
68
External
Pin Name
SSICLK
SSITXFR
SSITXDA
SSIRXDA
SSIRXFR
SSI2
Slave Mode
(Internal Name)
SSI2
Master Mode
SSICLK = serial bit
clock; Input
Output
SSKTXFR = TX
frame sync; Input
Output
SSITXDA = TX data;
Output
Output
SSIRXDA = RX data;
Input
Input
SSIRXFR = RX
frame sync; Input
Output
Codec
Internal Name
PCMCLK =
Output
PCMSYNC = Output
PCMOUT = Output
PCMIN = Input
p/u
(use a 10k pull-up)
Table 20. Serial-Pin Assignments
DAI
Strength
Internal Name
SCLK =
Output
1
LRCK = Output
1
SDOUT = Output
1
SDIN = Input
MCLK
1
DS453PP2
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