EP7209 Datasheet, PDF (24/128 Pages) Cirrus Logic – Ultra-Low-Power Audio Decoder System-on-Chip

EP7209
When the clock frequency is selected to be
36 MHz, both the ARM720T and the address/data
buses are clocked at 36 MHz. When the clock fre-
quency is selected higher than 36 MHz, only the
ARM720T gets clocked at this higher speed. The
address/data will be fixed at 36 MHz. The clock
frequency used is selected by programming the
CLKCTL[1:0] bits in the SYSCON3 register. The
clock frequency selection does not effect the EPB.
Therefore, all the peripheral clocks are fixed, re-
gardless of the clock speed selected for the
ARM720T.
NOTE: After modifying the CLKCTL[1:0] bits, the
next instruction should always be a ‘NOP’.
3.4.1.1 Characteristics of the PLL Interface
When connecting a crystal to the on-chip PLL in-
terface pins (i.e. MOSCIN and MOSCOUT), the
crystal and circuit should conform to the following
requirements:
• The 3.6864 MHz frequency should be created
by the crystals fundamental tone (i.e., it should
be a fundamental mode crystal).
• A start-up resistor is not necessary, since one is
provided internally.
• Start-up loading capacitors may be placed on
each side of the external crystal and ground.
Their value should be in the range of 10 pF.
However, their values should be selected based
upon the crystal specifications. The total sum of
the capacitance of the traces between the
EP7209’s clock pins, the capacitors, and the
crystal leads should be subtracted from the
crystal’s specifications when determining the
values for the loading capacitors.
• The crystal should have a maximum 100 ppm
frequency drift over the chip’s operating tem-
perature range.
Alternatively, a digital clock source can be used to
drive the MOSCIN pin of the EP7209. With this
approach, the voltage levels of the clock source
should match that of the Vdd supply for the
EP7209’s pads (i.e. the supply voltage level used to
drive all of the non-Vdd core pins on the EP7209).
The output clock pin (i.e., MOSCOUT) should be
left floating.
3.4.2 External Clock Input (13 MHz)
An external 13 MHz crystal oscillator can be used
to drive all of the EP7209. When selected the
ARM720T and the address/data buses both get
clocked at 13 MHz. The fixed clock sources to the
various peripherals will have different frequencies
than in the PLL mode. In this configuration, the
PLL will not be used at all.
NOTE:
When operating at 13 MHz, the
CLKCTL[1:0] bits should not be changed
from their default value of ‘00’.
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