Z51F3220FNX Datasheet, PDF (92/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

10.8 Interrupt Enable Accept Timing
Z51F3220
Product Specification
System
Clock
Max. 4 Machine Cycle
Interrupt
goes
Active
Interrupt
Latched
4 Machine Cycle
Interrupt Processing
: LCALL & LJMP
Interrupt Routine
Figure 10.7 Interrupt Response Timing Diagram
10.9 Interrupt Service Routine Address
Basic Interval Timer
Vector Table Address
00B3H
01H
00B4H
25H
Basic Interval Timer
Service Routine Address
0125H
0EH
0126H
2EH
Figure 10.8 Correspondence between Vector Table Address and the Entry Address of ISP
10.10 Saving/Restore General-Purpose Registers
INTxx : PUSH PSW
PUSH DPL
PUSH DPH
PUSH B
PUSH ACC
·
·
Interrupt_Processing:
∙∙
POP ACC
POP B
POP DPH
POP DPL
POP PSW
RETI
Main Task
Interrupt
Service Task
Saving
Register
Restoring
Register
Figure 10.9 Saving/Restore Process Diagram and Sample Source
PS029902-0212
PRELIMINARY
89