Z51F3220FNX Datasheet, PDF (125/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
11.6.3 16-Bit Capture Mode
The 16-bit timer 1 capture mode is set by T1MS[1:0] as ‘01’. The clock source can use the internal/external
clock. Basically, it has the same function as the 16-bit timer/counter mode and the interrupt occurs when
T1CNTH/T1CNTL is equal to T1ADRH/T1ADRL. The T1CNTH, T1CNTL values are automatically cleared by
match signal. It can be also cleared by software (T1CC).
This timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than the
maximum period of timer.
The capture result is loaded into T1BDRH/T1BDRL.
According to EIPOL1 registers setting, the external interrupt EINT11 function is chosen. Of cource, the EINT11
pin must be set as an input port.
T1CRH T1EN
–
T1MS1 T1MS0
–
–
–
T1CC
ADDRESS:BBH
INITIAL VALUE : 0000 _0000B
1
–
0
1
–
–
–
X
T1CRL T1CK1 T1CK1 T1CK0 T1IFR
–
T1POL T1 ECE T1CNTR ^ADDRESS:BAH
INITIAL VALUE : 0000 _0000B
X
X
X
X
–
X
X
X
EC1
16-bit A Data Register
T1ADRH/T1ADRL
T1ECE
T1 CK[2:0]
3
Edge
Detector
P
fx/1
r
fx/2
e
fx/4
M
fx
s
c
fx/8
U
X
a fx/64
l _fx/512
e
r ^fx/2048
EIPOLB [1:0]
T1 EN
Clear
Reload
Buffer Register A
A Match
Comparator
16- bit Counter _R
T1CNTH/T1 CNTL
Clear
A Match
T1CC
T1EN
INT_ACK
Clear
T1IFR
To interrupt
block
A Match
T1 CC
T1 EN
2
EINT11
T1 CNTR
2
T1MS[1:0]
16-bit B Data Register
T1 BDRH/T1 BDRL
INT_ACK
Clear
FLAG11
(EIFLAG1.2)
To interrupt
block
Figure 11.16 16-Bit Capture Mode for Timer 1
PS029902-0212
PRELIMINARY
122