Z51F3220FNX Datasheet, PDF (54/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
8.2 Data Memory
Figure 8-2 shows the internal data memory space available.
FFH
Upper 128 Bytes
Internal RAM
(Indirect Addressing )
80H
7FH
Lower 128 Bytes
Internal RAM
(Direct or Indirect
Addressing )
00H
FFH
Special Function Registers
128 Bytes
(Direct Addressing)
80H
Figure 8.2 Data Memory Map
The internal data memory space is divided into three blocks, which are generally referred to as the lower 128
bytes, upper 128 bytes, and SFR space.
Internal data memory addresses are always one byte wide, which implies an address space of only 256 bytes.
However, in fact the addressing modes for internal RAM can accommodate up to 384 bytes by using a simple
trick. Direct addresses higher than 7FH access one memory space and indirect addresses higher than 7FH
access a different memory space. Thus Figure 8-2 shows the upper 128 bytes and SFR space occupying the
same block of addresses, 80H through FFH, although they are physically separate entities.
The lower 128 bytes of RAM are present in all 8051 devices as mapped in Figure 8-3. The lowest 32 bytes are
grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in
the Program Status Word select which register bank is in use. This allows more efficient use of code space, since
register instructions are shorter than instructions that use direct addressing.
The next 16 bytes above the register banks form a block of bit-addressable memory space. The 8051 instruction
set includes a wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by
these instructions. The bit addresses in this area are 00H through 7FH.
All of the bytes in the lower 128 bytes can be accessed by either direct or indirect addressing. The upper 128
bytes RAM can only be accessed by indirect addressing. These spaces are used for data RAM and stack.
PS029902-0212
PRELIMINARY
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