Z51F3220FNX Datasheet, PDF (234/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
The process for detecting stop bit is like clock and data recovery process. That is, if 2 or more samples of 3
center values have high level, correct stop bit is detected, else a frame error (FE1) flag is set. After deciding
whether the first stop bit is valid or not, the Receiver goes to idle state and monitors the RXD1 line to check a
valid high to low transition is detected (start bit detection).
RXD1
STOP 1
(A)
(B)
(C)
Sample
(DBLS1 = 0)
Sample
(DBLS1 = 1)
1 2 3 4 5 6 7 8 9 10 11 12 13
1
2
3
4
5
6
7
Figure 11.84 Stop Bit Sampling and Next Start Bit Sampling (USI1)
PS029902-0212
PRELIMINARY
232