Z51F3220FNX Datasheet, PDF (150/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
11.8.6 10-Bit Timer 4 PWM Mode
The timer 4 has a high speed PWM (Pulse Width Modulation) function. In PWM mode, the 6-channel pins output
up to 10-bit resolution PWM output. This pin should be configured as a PWM output by set PWM4E to ‘1’. When
the value of 2bit +T4CNT and T4PPRH/L are identical in timer 4, a period match signal is generated and the
interrupt of timer 4 occurs. In 10-bit PWM mode, A, B, C, bottom(underflow) match signal are generated when the
10-bit counter value are identical to the value of T4xADRH/L. The period of the PWM output is determined by the
T4PPRH/L (PWM period register), T4xDRH/L (each channel PWM duty register).
PWM Period = [T4PPRH/T4PPRL ] X Source Clock
PWM Duty(A-ch) = [ T4ADRH/T4ADRL ] X Source Clock
Table 11-12 PWM Frequency vs. Resolution at 8 MHz
Resolution
10 Bit
9 Bit
8 Bit
7 Bit
T4CK[3:0]=0001 (250ns)
3.9KHz
7.8KHz
15.6KHz
31.2KHz
Frequency
T4CK[3:0]=0010 (500ns)
1.95KHz
3.9KHz
7.8KHz
15.6KHz
T4CK[3:0]=0100 (2us)
0.49KHz
0.98KHz
1.95KHz
3.91KHz
The POLxA bit of T4PCR3 register decides the polarity of duty cycle. If the duty value is set same to the period
value, the PWM output is determined by the bit POLxA (1: High, 0: Low). And if the duty value is set to "00H", the
PWM output is determined by the bit POLxA (1: Low, 0: High).
Table 11-13 PWM Channel Polarity
PHLT:PxxOE POLxA
0
0x, x0, 00
1
0
11
1
POLBO
0
1
0
1
x
x
POLxB
0
1
x
0
1
x
0
1
0
1
PWM4xA Pin Output
Low-level
Low-level
Low-level
High-level
High-level
High-level
Positive-phase
Positive-phase
Negative-Phase
Negative-Phase
PWM4xB Pin Output
Low-level
High-level
Low-level
High-level
Low-level
High-level
Positive-Phase
Negative-Phase
Negative-Phase
Positive-phase
PS029902-0212
PRELIMINARY
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