Z51F3220FNX Datasheet, PDF (153/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
Source Clock
(fx)
T4CNT
P02/PWM4AA
POLAA = 1
P02/PWM4AA
POLAA = 0
00 01 02 03 04
7F 80 81 82
3FF 00 01 02
Duty Cycle(1+80H)X250ns = 32.25us
Period Cycle(1+3FFH)X250ns = 256us  3.9kHz
T4CR = 00H (fXIN)
T4PPRH = 03H
T4PPRL = FFH
T4ADRH = 00H
T4ADRL = 80H
T4PPRH(2 Bit)
03H
T4ADRH(2 Bit)
00H
T4PPRL(8 Bit)
FFH
T4ADRL(8 Bit)
80H
Figure 11.36 Example of PWM at 4 MHz
T4CR = 03H (2us)
T4PPRH = 00H
T4PPRL = 0EH
T4ADRH = 00H
T4ADRL = 05H
Source Clock
(fx)
Write 0AH to T4PPRL
T4CNT
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 00 01 02 03 04 05 06 07 08 09 0A 00 01 02 03 04 05 06
P02/PWM4AA
POLAA = 1
Duty Cycle
(1+05H)X2us = 12us
Period Cycle
(1+0EH)X2us = 32us  31.25kHz
Duty Cycle
(1+05H)X2us = 12us
Period Cycle
(1+0AH)X2us = 22us  45.5kHz
Duty Cycle
(1+05H)X2us = 12us
Figure 11.37 Example of Changing the Period in Absolute Duty Cycle at 4 MHz
Update period & duty register value at once
The period and duty of PWM comes to move from temporary registers to T4PPRH/L (PWM Period Register) and
T4ADRH/L/T4BDRH/L/T4CDRH/L (PWM Duty Register) when always period match occurs. If you want that the
period and duty is immediately changed, the UPDT bit in the T4PCR1 register must set to ‘1’. It should be noted
that it needs the 3 cycle of timer clock for data transfer in the internal clock synchronization circuit. So the update
data is written before 3 cycle of timer clock to get the right output waveform.
PS029902-0212
PRELIMINARY
150