Z51F3220FNX Datasheet, PDF (201/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
11.12.13 USI0 SPI Block Diagram
SS 0
SS
Control
USI0 SSEN
MASTER0
SCLK
(fx: System clock)
USI0BD
Baud Rate Generator
SCK0
MISO0
FXCH0
SCK
Control
M
U
X
RXE0
M
U
Rx Control
X
RXC0
M
Edge Detector
U
And
X
Controller
I
N
T
CPOL0 CPHA0
E
Data
Receive Shift Register
R
Recovery
(RXSR)
N
A
L
RXCIE0
LOOPS 0
DOR0 Checker
USI0 DR[0], (Rx)
B
U
USI0 DR[1], (Rx)
S
MOSI0
MASTER0
To interrupt
block
ORD0
L
I
( MSB/LSB -1st)
N
TXE0
E
D
E
Tx Control
P
Clear
INT_ ACK
TXC0
Empty signal
DRE0
Transmit Shift Register
(TXSR)
USI0DR, (Tx)
TXCIE0
DRIE0
To interrupt
block
Figure 11.66 USI0 SPI Block Diagram
PS029902-0212
PRELIMINARY
199