Z51F3220FNX Datasheet, PDF (118/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
11.5.4 8-Bit Capture Mode
The timer 0 capture mode is set by T0MS[1:0] as ‘1x’. The clock source can use the internal/external clock.
Basically, it has the same function as the 8-bit timer/counter mode and the interrupt occurs when T0CNT is equal
to T0DR. T0CNT value is automatically cleared by match signal and it can be also cleared by software (T0CC).
This timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than the
maximum period of timer.
The capture result is loaded into T0CDR. In the timer 0 capture mode, timer 0 output (T0O) waveform is not
available.
According to EIPOL1 registers setting, the external interrupt EINT10 function is chosen. Of cource, the EINT10
pin must be set to an input port.
T0CDR and T0DR are in the same address. In the capture mode, reading operation reads T0CDR, not T0DR
and writing operation will update T0DR.
T0CR
T0EN
1
-
T0MS1 T0MS0 T0CK2 T0CK1 T0CK0 T0CC ^{ADDRESS : B2 H}
INITIAL VALUE: 0000 _0000B
-
1
x
x
x
x
x
EC0
fx
P
fx/2
r
fx/4
e
fx/8
M
s
U
c
fx/32
X
a fx/128
l _fx/512
e
r ^fx/2048
3
T0CK[2:0 ]
EIPOL1[1:0]
Clear
Clear
8-bit Timer 0 Counter
T0CNT(8Bit)
T0 EN
Match
MUX
Comparator
T0DR(8Bit)
8-bit Timer 0 Data Register
2
T0MS[1:0]
2
EINT10
2
T0 MS[1 :0]
T0CDR(8 Bit)
INT_ACK
Clear
FLAG10
(EIFLAG 1.0 )
Match signal
T0 CC
INT_ACK
Clear
T0IFR
To interrupt
block
Figure 11.10 8-Bit Capture Mode for Timer 0
To interrupt
block
PS029902-0212
PRELIMINARY
115