Z51F3220FNX Datasheet, PDF (154/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
Phase correction & Frequency correction
On operating PWM, it is possible that it is changed the phase and the frequency by using BMOD bit (back-to-
back mode) in T4PCR1 register. (Figure 1.38, Figure 11.39, Figure 11.40 referred)
In the back-to-back mode, the counter of PWM repeats up/down count. In fact, the effective duty and period
becomes twofold of the register set values. (Figure 1.38, Figure 11.39 referred)
MAX
MAX
Duty, Period
Update
MAX
T4CNT
00H
Normal PWM
mode
00H
Duty
Period
MAX
00H
00H
MAX
Duty, Period
Update
T4CNT
00H
00H
00H
Back-to-Back
mode
Non Back-to-Back mode
Duty
Duty
Period
Period
Back-to-Back mode
Figure 11.38 Example of PWM Output Waveform
MAX
00H
MAX
T4CR = 03H (2us)
T4PPRH = 00H
T4PPRL = 0BH
T4ADRH = 00H
T4ADRL = 05H
Source Clock
(fX)
Duty match
detect
Start down Counter
Duty match
detect
Start up Counter
T4CNT
00 01 02 03 04 05 06 07 08 09 0A 0B 0B 0A 09 08 07 06 05 04 03 02 01 00 00 01 02 03 04 05 06 07 08
P02/PWM4AA
POLAA = 1
Duty Cycle
(1+05H)X2us = 12us
Period Cycle
(1+0BH)X2us = 26us  38.46kHz
Duty Cycle
Duty Cycle
(1+05H)X2us = 12us (1+05H)X2us = 12us
Period Cycle
(1+0BH)X2us = 26us  38.46kHz
Figure 11.39 Example of PWM waveform in Back-to-Back mode at 4 MHz
PS029902-0212
PRELIMINARY
151