Z51F3220FNX Datasheet, PDF (28/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
Table 5-1 Normal Pin Description (Continued)
PIN
Name
I/O
Function
I/O System reset pin with a pull-up resistor when it
RESETB
is selected as the RESETB by CONFIGURE
OPTION
DSDA I/O On chip debugger data input/output ^(NOTE4,5)
DSCL I/O On chip debugger clock input ^(NOTE4,5)
XIN _{I/O Main oscillator pins}
XOUT
SXIN _{I/O Sub oscillator pins}
SXOUT
VDD,
VSS
– ^{Power input pins}
@RESET
Input
Input
Input
Input
Input
–
Shared with
P55
P00/EC3
P01/T3O
P51
P50
P53/T0O/PWM0O
P54/EINT10
–
NOTES) 1. The P14–P17, P23–P25, P34–P37, and P43 are not in the 32-pin package.
2. The P55/RESETB pin is configured as one of the P55 and RESETB pin by the “CONFIGURE
OPTION.”
3. If the P00/EC3/DSDA and P01/T3O/DSCL pins are connected to an emulator during the resetor
power-on reset, the pins are automatically configured as the debugger pins.
4. The P00/EC3/DSDA and P01/T3O/DSCL pins are configured as inputs with internal pull-up resistor
only during the reset or power-on reset.
5. The P50/XOUT, P51/XIN, P53/SXINT/T0O/PWM0O, and P54/SXOUT/EINT10 pins are
configured as a function pin by software control.
PS029902-0212
PRELIMINARY
25