Z51F3220FNX Datasheet, PDF (145/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
11.8.2 8-Bit Timer/Counter 3, 4 Mode
The 8-bit timer/counter mode is selected by control register as shown in Figure 11.30.
The two 8-bit timers have each counter and data register. The counter register is increased by internal or
external clock input. Timer 3 can use the input clock with one of 2, 4, 8, 32, 128, 512, 2048 and EC3 prescaler
division rates (T3CK[2:0]). Timer 4 can use the input clock with one of 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024,
2048, 4096, 8192, 16384 and timer 3 clock prescaler division rates (T4CK[3:0]). When the value of T3CNT,
T4CNT and T3DR, T4DR are respectively identical in Timer 3, 4, the interrupt Timer 3, 4 occurs.
The external clock (EC3) counts up the timer at the rising edge. If the EC3 is selected as a clock source by
T3CK[2:0], EC3 port should be set to the input port by P00IO bit. Timer 4 can’t use the external EC3 clock.
T3CR
T4CR
T3EN
1
–
T3MS T3 CK2 T3CK1 T3CK0 T3 CN T3ST
–
0
X
X
X
X
X
16BIT
0
T4 MS
0
T4CN
X
T4ST
X
T4CK3 T4CK2 T4CK1 T4CK0
X
X
X
X
ADDRESS:1000H (ESFR)
INITIAL VALUE : 0000 _0000 B
ADDRESS:1002H (ESFR)
INITIAL VALUE : 0000 _0000 B
T4CK[3:0]
4
8-bit Timer 4 Data Register
T4DR (8Bit)
P
fx/1
Comparator
r
fx/2
T4 CN
e
fx/4
s
fx
c
fx/8
M
a
U
l
X
T4CNT (8Bit)
Match
Clear
e
r ^fx/16384
8-bit Timer 4 Counter
T4ST
T4O
To interrupt
block
EC3
fx
P
fx/2
r
fx/4
e
fx/8
M
s
U
c
fx/32
X
a fx/128
l _fx/512
e
r ^fx/2048
T3CN
3
T3CK[2:0]
T3ST
8-bit Timer 3 Counter
T3CNT (8Bit)
Clear
Match
Comparator
T3DR (8Bit)
8-bit Timer 3 Data Register
INT_ACK
Clear
T3IFR
To interrupt
block
T3 O
NOTE: Do not set to “1111b” in the T4CK[3:0], when two 8-bit timer 3/4 modes.
Figure 11.30 8-Bit Timer/Counter Mode for Timer 3, 4
PS029902-0212
PRELIMINARY
142