Z51F3220FNX Datasheet, PDF (8/312 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F3220
Product Specification
Figure 11.3 Watch Dog Timer Interrupt Timing Waveform ..................................................................... 105
Figure 11.4 Watch Dog Timer Block Diagram ......................................................................................... 106
Figure 11.5 Watch Timer Block Diagram................................................................................................. 108
Figure 11.6 8-Bit Timer/Counter Mode for Timer 0 ................................................................................. 112
Figure 11.7 8-Bit Timer/Counter 0 Example ............................................................................................ 112
Figure 11.8 8-Bit PWM Mode for Timer 0................................................................................................ 113
Figure 11.9 PWM Output Waveforms in PWM Mode for Timer 0 ........................................................... 114
Figure 11.10 8-Bit Capture Mode for Timer 0.......................................................................................... 115
Figure 11.11 Input Capture Mode Operation for Timer 0 ........................................................................ 116
Figure 11.12 Express Timer Overflow in Capture Mode ......................................................................... 116
Figure 11.13 8-Bit Timer 0 Block Diagram .............................................................................................. 117
Figure 11.14 16-Bit Timer/Counter Mode for Timer 1 ............................................................................. 121
Figure 11.15 16-Bit Timer/Counter 1 Example........................................................................................ 121
Figure 11.16 16-Bit Capture Mode for Timer 1........................................................................................ 122
Figure 11.17 Input Capture Mode Operation for Timer 1 ........................................................................ 123
Figure 11.18 Express Timer Overflow in Capture Mode ......................................................................... 123
Figure 11.19 16-Bit PPG Mode for Timer 1 ............................................................................................. 124
Figure 11.20 16-Bit PPG Mode Timming chart for Timer 1..................................................................... 125
Figure 11.21 16-Bit Timer/Counter Mode for Timer 1 and Block Diagram ............................................. 126
Figure 11.22 16-Bit Timer/Counter Mode for Timer 2 ............................................................................. 131
Figure 11.23 16-Bit Timer/Counter 2 Example........................................................................................ 132
Figure 11.24 16-Bit Capture Mode for Timer 2........................................................................................ 133
Figure 11.25 Input Capture Mode Operation for Timer 2 ........................................................................ 134
Figure 11.26 Express Timer Overflow in Capture Mode ......................................................................... 134
Figure 11.27 16-Bit PPG Mode for Timer 2 ............................................................................................. 135
Figure 11.28 16-Bit PPG Mode Timming chart for Timer 2..................................................................... 136
Figure 11.29 16-Bit Timer/Counter Mode for Timer 2 and Block Diagram ............................................. 137
Figure 11.30 8-Bit Timer/Counter Mode for Timer 3, 4 ........................................................................... 142
Figure 11.31 16-Bit Timer/Counter Mode for Timer 3 ............................................................................. 143
Figure 11.32 8-Bit Capture Mode for Timer 3, 4..................................................................................... 145
Figure 11.33 16-Bit Capture Mode for Timer 3....................................................................................... 146
Figure 11.34 10-Bit PWM Mode (Force 6-ch) ........................................................................................ 148
Figure 11.35 10-Bit PWM Mode (Force All-ch) ...................................................................................... 149
Figure 11.36 Example of PWM at 4 MHz ............................................................................................... 150
Figure 11.37 Example of Changing the Period in Absolute Duty Cycle at 4 MHz .................................. 150
Figure 11.38 Example of PWM Output Waveform .................................................................................. 151
Figure 11.39 Example of PWM waveform in Back-to-Back mode at 4 MHz .......................................... 151
Figure 11.40 Example of Phase Correction and Frequency correction of PWM .................................... 152
Figure 11.41 Example of PWM External Synchronization with BLNK Input ........................................... 152
Figure 11.42 Example of Force Drive All Channel with A-ch .................................................................. 153
Figure 11.43 Example of Force Drive 6-ch Mode.................................................................................... 154
Figure 11.44 Example of PWM Delay ..................................................................................................... 157
Figure 11.45 Two 8-Bit Timer 3, 4 Block Diagram .................................................................................. 157
Figure 11.46 16-Bit Timer 3 Block Diagram ............................................................................................ 158
Figure 11.47 10-Bit PWM Timer 4 Block Diagram ................................................................................. 158
Figure 11.48 Buzzer Driver Block Diagram ............................................................................................. 170
Figure 11.49 SPI 2 Block Diagram .......................................................................................................... 172
Figure 11.50 SPI 2 Transmit/Receive Timing Diagram at CPHA = 0 ..................................................... 174
Figure 11.51 SPI 2 Transmit/Receive Timing Diagram at CPHA = 1 ..................................................... 174
PS029902-0212
PRELIMINARY
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