Z8F082ASH020SC Datasheet, PDF (53/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
35
Table 14. Port Alternate Function Mapping (Continued)(20/28-Pin Parts)
Port
Pin Mnemonic
Alternate Function Description
Alternate
Function Set
Register AFS1
Port B ^{PB0 Reserved}
ANA0/AMPOUT ADC Analog Input/Transamp Output
AFS1[0]: 0
AFS1[0]: 1
PB1 Reserved
AFS1[1]: 0
ANA1/AMPINN ADC Analog Input/Transamp Input (N) AFS1[1]: 1
PB2 Reserved
AFS1[2]: 0
ANA2/AMPINP ADC Analog Input/Transamp Input (P) AFS1[2]: 1
PB3 CLKIN
External Clock Input
AFS1[3]: 0
ANA3
ADC Analog Input
AFS1[3]: 1
PB4 Reserved
AFS1[4]: 0
ANA7
ADC Analog Input
AFS1[4]: 1
PB5 Reserved
AFS1[5]: 0
VREF
ADC Voltage Reference
AFS1[5]: 1
PB6 Reserved
AFS1[6]: 0
Reserved
AFS1[6]: 1
PB7 Reserved
AFS1[7]: 0
Reserved
AFS1[7]: 1
Note: Because there are at most two choices of alternate function for any pin of Port B, the Alternate
Function Set register AFS2 is implemented but not used to select the function. Also, alternate
function selection as described in “Port A–D Alternate Function Sub-Registers” on page 39 must
also be enabled.
PS024705-0405
PRELIMINARY
General-Purpose I/O