Z8F082ASH020SC Datasheet, PDF (160/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
142
FWP—Flash Write Protect
This Option Bit provides Flash Program Memory protection:
0 = Programming and erasure disabled for all of Flash Program Memory. Programming,
Page Erase, and Mass Erase through User Code is disabled. Mass Erase is available using
the On-Chip Debugger.
1 = Programming, Page Erase, and Mass Erase are enabled for all of Flash Program Mem-
ory.
Flash Program Memory Address 0001H
Table 88. Flash Options Bits at Program Memory Address 0001H
BITS
7
6
5
4
3
2
1
0
FIELD
Reserved
XTLDIS
Reserved
RESET
U
U
U
U
U
U
U
U
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ADDR
Program Memory 0001H
Note: U = Unchanged by Reset. R/W = Read/Write.
Reserved—Must be 1.
XTLDIS—State of Crystal Oscillator at Reset
Note:
This bit only enables the crystal oscillator, its selection as system clock must be done man-
ually.
0 = Crystal oscillator is enabled during reset, resulting in longer reset timing
1 = Crystal oscillator is disabled during reset, resulting in shorter reset timing
Trim Bit Address Space
Trim Bit Address 0000H
Table 89. Trim Options Bits at Address 0000H (TTEMP0)
BITS
7
6
5
4
3
2
1
0
FIELD
TS_FINE
Reserved
TS_ULTRAFINE
RESET
U
U
U
U
U
U
U
U
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ADDR
Information Page Memory 0020H
Note: U = Unchanged by Reset. R/W = Read/Write.
PS024705-0405
PRELIMINARY
Flash Option Bits