Z8F082ASH020SC Datasheet, PDF (223/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
205
DE
(Output)
Figure 36 and Table 131 provide timing information for UART pins for the case where
CTS is not used for flow control. DE asserts after the transmit data register has been writ-
ten. DE remains asserted for multiple characters as long as the transmit data register is
written with the next character before the current character has completed.
T2
TXD
(Output)
start bit0
bit 1
T1
bit 7 parity stop
end of
stop bit(s)
Figure 36. UART Timing Without CTS
Parameter
UART
T₁
T₂
Table 131. UART Timing Without CTS
Abbreviation
Delay (ns)
Minimum Maximum
DE assertion to TXD falling edge (start bit) delay
End of Stop Bit(s) to DE deassertion delay (Tx
data register is empty)
1 * XIN
period
±5
1 bit time
PS024705-0405
PRELIMINARY
Electrical Characteristics