Z8F082ASH020SC Datasheet, PDF (46/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
28
Low-Power Modes
Overview
The Z8 Encore! XP^® F08xA Series products contain power-saving features. The highest
level of power reduction is provided by the STOP mode. The next lower level of power
reduction is provided by the HALT mode.
Further power savings can be implemented by disabling individual peripheral blocks
while in Normal mode.
STOP Mode
Executing the eZ8 CPU’s STOP instruction places the device into STOP mode. In STOP
mode, the operating characteristics are:
• Primary crystal oscillator and internal precision oscillator are stopped; XIN and XOUT (if
previously enabled) are disabled, and PA0/PA1 revert to the states programmed by the
GPIO registers
• System clock is stopped
• eZ8 CPU is stopped
• Program counter (PC) stops incrementing
• Watch-Dog Timer’s internal RC oscillator continues to operate if enabled by the Oscillator
Control Register
• If enabled, the Watch-Dog Timer logic continues to operate
• If enabled for operation in STOP mode by the associated Flash Option Bit, the Voltage-
brown out protection circuit continues to operate
• Transimpedance amplifier in the ADC block continues to operate if enabled by the Power
Control Register to do so; all other portions of the ADC are disabled
• All other on-chip peripherals are idle
To minimize current in STOP mode, all GPIO pins that are configured as digital inputs
must be driven to one of the supply rails (V_CC or GND). The device can be brought out of
STOP mode using STOP Mode Recovery. For more information about STOP Mode
Recovery refer to “Reset and STOP Mode Recovery” on page 19.
PS024705-0405
PRELIMINARY
Low-Power Modes