Z8F082ASH020SC Datasheet, PDF (219/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
201
System
Clock
Port Pin
Input Value
Port Input Data
Register Latch
Port Input Data
Read on Data Bus
TCLK
Port Value
Changes to 0
0 Latched
Into Port Input
Data Register
Port Input Data Register
Value 0 Read
by eZ8
Figure 32. Port Input Sample Timing
Table 127. GPIO Port Input Timing
Parameter
T_{S_PORT}
T_{H_PORT}
T_SMR
Abbreviation
Port Input Transition to XIN Rise Setup Time
(Not pictured)
XIN Rise to Port Input Transition Hold Time
(Not pictured)
GPIO Port Pin Pulse Width to ensure STOP Mode
Recovery
(for GPIO Port Pins enabled as SMR sources)
Delay (ns)
Minimum Maximum
5
–
0
–
1µs
PS024705-0405
PRELIMINARY
Electrical Characteristics