Z8F082ASH020SC Datasheet, PDF (201/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
183
Assembly
Mnemonic
OR dst, src
ORX dst, src
POP dst
POPX dst
PUSH src
PUSHX src
RCF
RET
RL dst
Table 116. eZ8 CPU Instruction Summary (Continued)
Symbolic Operation
dst ← dst OR src
dst ← dst OR src
dst ← @SP
SP ← SP + 1
dst ← @SP
SP ← SP + 1
SP ← SP – 1
@SP ← src
SP ← SP – 1
@SP ← src
C←0
PC ← @SP
SP ← SP + 2
C
D7 D6 D5 D4 D3 D2 D1 D0
dst
Address Mode _Opcode(s)
Flags
Fetch Instr.
dst src
(Hex) C Z S V D H Cycles Cycles
r
r
42
–**0–– 2
3
r
Ir
43
2
4
R
R
44
3
3
R
IR
45
3
4
R
IM
46
3
3
IR
IM
47
3
4
ER ER
48
–**0–– 4
3
ER IM
49
4
3
R
50
––––– – 2
2
IR
51
2
3
ER
D8
––––– – 3
2
R
70
––––– – 2
2
IR
71
2
3
IM
IF70
3
2
ER
C8
––––– – 3
2
CF
0–––– – 1
2
AF
––––– – 1
4
R
90
****–– 2
2
IR
91
2
3
RLC dst
R
C
D7 D6 D5 D4 D3 D2 D1 D0
dst
IR
10
****–– 2
2
11
2
3
RR dst
R
D7 D6 D5 D4 D3 D2 D1 D0
C
IR
dst
E0
****–– 2
2
E1
2
3
Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
PS024705-0405
PRELIMINARY
eZ8 CPU Instruction Set