Z8F082ASH020SC Datasheet, PDF (36/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
18
Table 7. Register File Address Map (Continued)
Address (Hex) Register Description
FF0
Reset Status
Watch-Dog Timer Control
FF1
Watch-Dog Timer Reload Upper Byte
FF2
Watch-Dog Timer Reload High Byte
FF3
Watch-Dog Timer Reload Low Byte
FF4–FF5
Reserved
Trim Bit Control
FF6
Trim Bit Address
FF7
Trim Data
Mnemonic
RSTSTAT
WDTCTL
WDTU
WDTH
WDTL
—
TRMADR
TRMDR
Reset (Hex)
XX
XX
FF
FF
FF
XX
00
XX
Flash Memory Controller
FF8
Flash Control
FCTL
00
FF8
Flash Status
FSTAT
00
FF9
Flash Page Select
FPS
00
Flash Sector Protect
FPROT
00
FFA
Flash Programming Frequency High Byte FFREQH
00
FFB
Flash Programming Frequency Low Byte FFREQL
00
eZ8 CPU
FFC
FFD
FFE
FFF
XX=Undefined
Flags
Register Pointer
Stack Pointer High Byte
Stack Pointer Low Byte
—
XX
RP
XX
SPH
XX
SPL
XX
Page #
82
82
83
83
83
140
140
134
134
135
136
137
137
Refer to the
eZ8 CPU User
Manual
PS024705-0405
PRELIMINARY
Register Map