Z8F082ASH020SC Datasheet, PDF (190/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
172
.
Table 106. Notational Shorthand
Notation Description
b
Bit
cc
Condition Code
DA
Direct Address
ER
Extended Addressing Register
IM
Immediate Data
Ir
Indirect Working Register
IR
Indirect Register
Irr
Indirect Working Register Pair
IRR
Indirect Register Pair
p
Polarity
r
Working Register
R
Register
RA
Relative Address
rr
Working Register Pair
RR
Register Pair
Vector Vector Address
X
Indexed
Operand Range
b
b represents a value from 0 to 7 (000B to 111B).
—
See Condition Codes overview in the eZ8 CPU
User Manual.
Addrs
Addrs. represents a number in the range of
0000H to FFFFH
Reg
Reg. represents a number in the range of 000H to
FFFH
#Data Data is a number between 00H to FFH
@Rn n = 0 –15
@Reg Reg. represents a number in the range of 00H to
FFH
@RRp p = 0, 2, 4, 6, 8, 10, 12, or 14
@Reg Reg. represents an even number in the range
00H to FEH
p
Polarity is a single bit binary value of either 0B or
1B.
Rn
n = 0 – 15
Reg
Reg. represents a number in the range of 00H to
FFH
X
X represents an index in the range of +127 to –
128 which is an offset relative to the address of
the next instruction
RRp
p = 0, 2, 4, 6, 8, 10, 12, or 14
Reg
Reg. represents an even number in the range of
00H to FEH
Vector Vector represents a number in the range of 00H
to FFH
#Index
The register or register pair to be indexed is offset
by the signed Index value (#Index) in a +127 to
-128 range.
Table 107 contains additional symbols that are used throughout the Instruction Summary
and Instruction Set Description sections.
PS024705-0405
PRELIMINARY
eZ8 CPU Instruction Set