|
Z8F082ASH020SC Datasheet, PDF (102/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals | |||
|
◁ |
Z8 Encore! XP® F08xA Seriess
Product Specification
84
UART
Overview
The Universal Asynchronous Receiver/Transmitter (UART) is a full-duplex communica-
tion channel capable of handling asynchronous data transfers. The UART uses a single
8-bit data mode with selectable parity. Features of the UART include:
⢠8-bit asynchronous data transfer
⢠Selectable even- and odd-parity generation and checking
⢠Option of one or two STOP bits
⢠Separate transmit and receive interrupts
⢠Framing, parity, overrun and break detection
⢠Separate transmit and receive enables
⢠16-bit Baud Rate Generator (BRG)
⢠Selectable MULTIPROCESSOR (9-bit) mode with three configurable interrupt schemes
⢠Baud Rate Generator timer mode
⢠Driver Enable output for external bus transceivers
Architecture
The UART consists of three primary functional blocks: transmitter, receiver, and baud rate
generator. The UARTâs transmitter and receiver function independently, but employ the
same baud rate and data format. Figure 9 illustrates the UART architecture.
PS024705-0405
PRELIMINARY
UART
|
▷ |