Z8F082ASH020SC Datasheet, PDF (169/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
151
• Asserting the RESET pin Low to initiate a Reset.
• Driving the DBG pin Low while the device is in STOP mode initiates a System Reset.
OCD Data Format
The OCD interface uses the asynchronous data format defined for RS-232. Each character
is transmitted as 1 Start bit, 8 data bits (least-significant bit first), and 1.5 Stop bits
(Figure 24)
START
D0
D1
D2
D3
D4
D5
D6
D7 STOP
Figure 24.OCD Data Format
OCD Auto-Baud Detector/Generator
To run over a range of baud rates (data bits per second) with various system clock frequen-
cies, the On-Chip Debugger contains an Auto-Baud Detector/Generator. After a reset, the
OCD is idle until it receives data. The OCD requires that the first character sent from the
host is the character 80H. The character 80H has eight continuous bits Low (one Start bit
plus 7 data bits), framed between High bits. The Auto-Baud Detector measures this period
and sets the OCD Baud Rate Generator accordingly.
The Auto-Baud Detector/Generator is clocked by the system clock. The minimum baud
rate is the system clock frequency divided by 512. For optimal operation with asynchro-
nous datastreams, the maximum recommended baud rate is the system clock frequency
divided by 8. The maximum possible baud rate for asynchronous datastreams is the sys-
tem clock frequency divided by 4, but this theoretical maximum is possible only for low
noise designs with clean signals. Table 98 lists minimum and recommended maximum
baud rates for sample crystal frequencies.
Table 98. OCD Baud-Rate Limits
Recommended
System Clock Frequency Maximum Baud
(MHz)
Rate (Kbps)
20.0
2500.0
1.0
125.0
0.032768 (32KHz)
4.096
Recommended
Standard PC Baud
Rate (bps)
1,843,200
115,200
2400
Minimum Baud
Rate (Kbps)
39
1.95
0.064
PS024705-0405
PRELIMINARY
On-Chip Debugger