Z8F082ASH020SC Datasheet, PDF (198/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
180
Assembly
Mnemonic
COM dst
CP dst, src
CPC dst, src
CPCX dst, src
CPX dst, src
DA dst
DEC dst
DECW dst
DI
DJNZ dst, RA
EI
Flags Notation:
Table 116. eZ8 CPU Instruction Summary (Continued)
Symbolic Operation
Address Mode _Opcode(s)
Flags
Fetch Instr.
dst src
(Hex) C Z S V D H Cycles Cycles
dst ← ~dst
R
60
–**0–– 2
2
IR
61
2
3
dst - src
r
r
A2
****–– 2
3
r
Ir
A3
2
4
R
R
A4
3
3
R
IR
A5
3
4
R
IM
A6
3
3
IR
IM
A7
3
4
dst - src - C
r
r
1F A2 * * * * – – 3
3
r
Ir
1F A3
3
4
R
R
1F A4
4
3
R
IR
1F A5
4
4
R
IM
1F A6
4
3
IR
IM
1F A7
4
4
dst - src - C
ER ER
1F A8 * * * * – – 5
3
ER IM
1F A9
5
3
dst - src
ER ER
A8
****–– 4
3
ER IM
A9
4
3
dst ← DA(dst)
R
40
* * *X– – 2
2
IR
41
2
3
dst ← dst - 1
R
30
–***–– 2
2
IR
31
2
3
dst ← dst - 1
RR
80
–***–– 2
5
IRR
81
2
6
IRQCTL[7] ← 0
8F
––––– – 1
2
dst ← dst – 1
r
if dst ≠ 0
PC ← PC + X
0A-FA – – – – – – 2
3
IRQCTL[7] ← 1
9F
––––– – 1
2
* = Value is a function of the result of the operation.
– = Unaffected
X = Undefined
0 = Reset to 0
1 = Set to 1
PS024705-0405
PRELIMINARY
eZ8 CPU Instruction Set