Z8F082ASH020SC Datasheet, PDF (120/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Seriess
Product Specification
102
UART Baud Rate Divisor Value (BRG) = Round_⎝⎛^{S-1---y6---s--}_×^{t--e--U-m----A--C--R---l-To---c---Dk----a-F--t--ra--e---Rq---u-a---et--en----c(--by----i-(t--Hs---/-sz---))}_⎠⎞
The baud rate error relative to the acceptable baud rate is calculated using the following
equation:
UART Baud Rate Error (%) = 100 × _⎝⎛-A----c---t--u---a---l---D----a---Dt--a--e---sR--i--ra--e-t--de----^–-D----Da---t-e-a--s--i-R-r---ea--d-t--e--D----a---t--a-----R----a---t--e-_⎠⎞
For reliable communication, the UART baud rate error must never exceed 5 percent.
Table 69 provides information about data rate errors for popular baud rates and commonly
used crystal oscillator frequencies.
Table 69. UART Baud Rates
10.0 MHz System Clock
Acceptable BRG Divisor Actual Rate Error
Rate (KHz) (Decimal)
(KHz)
(%)
1250.0
N/A
N/A
N/A
625.0
1
625.0
0.00
250.0
3
208.33 -16.67
115.2
5
125.0
8.51
57.6
11
56.8
-1.36
38.4
16
39.1
1.73
19.2
33
18.9
0.16
9.60
65
9.62
0.16
4.80
130
4.81
0.16
2.40
260
2.40
-0.03
1.20
521
1.20
-0.03
0.60
1042
0.60
-0.03
0.30
2083
0.30
0.2
5.5296 MHz System Clock
Acceptable BRG Divisor Actual Rate Error
Rate (KHz) (Decimal)
(KHz)
(%)
1250.0
N/A
N/A
N/A
625.0
N/A
N/A
N/A
250.0
1
345.6 38.24
115.2
3
115.2
0.00
57.6
6
57.6
0.00
38.4
9
38.4
0.00
19.2
18
19.2
0.00
9.60
36
9.60
0.00
4.80
72
4.80
0.00
2.40
144
2.40
0.00
1.20
288
1.20
0.00
0.60
576
0.60
0.00
0.30
1152
0.30
0.00
PS024705-0405
PRELIMINARY
UART