Z8F082ASH020SC Datasheet, PDF (50/244 Pages) Zilog, Inc. – Z8 Encore XP-R F08xA Series with eXtended Peripherals

Z8 Encore! XP^® F08xA Series
Product Specification
32
Port Input
Data Register
QD
Schmitt Trigger
QD
Port Output
Data Register
DATA
Bus
DQ
System
Clock
System
Clock
Port Output Control
VDD
Port
Pin
Port Data Direction
Figure 6.GPIO Port Pin Block Diagram
GND
GPIO Alternate Functions
Many of the GPIO port pins can be used for general-purpose I/O and access to on-chip
peripheral functions such as the timers and serial communication devices. The Port A–D
Alternate Function sub-registers configure these pins for either General-Purpose I/O or
alternate function operation. When a pin is configured for alternate function, control of the
port pin direction (input/output) is passed from the Port A–D Data Direction registers to
the alternate function assigned to this pin. Table 14 on page 34 lists the alternate functions
possible with each port pin. The alternate function associated at a pin is defined through
Alternate Function Sets sub-registers AFS1 and AFS2.
The crystal oscillator functionality is not controlled by the GPIO block. When the crystal
oscillator is enabled in the oscillator control block, the GPIO functionality of PA0 and PA1
is overridden. In that case, those pins function as input and output for the crystal oscillator.
PA0 and PA6 contain two different timer functions, a timer input and a complementary
timer output. Both of these functions require the same GPIO configuration, the selection
between the two is based on the timer mode. See “Timers” on page 58 for more details.
PS024705-0405
PRELIMINARY
General-Purpose I/O