W83L517D Datasheet, PDF (83/138 Pages) Winbond – LPC SUPER I/O

Bit 2:
Bit 1:
Bit 0:
INV_CRC - Inverting CRC
When set to 1, the CRC is inversely output in physical layer.
W83L517D
Version 0.6
DIS_CRC - Disable CRC
When set to 1, the transmitter does not transmit CRC in physical layer.
Reserved, write 1.
5.8.2 Set6.Reg1 - MIR (1.152M/0.576M bps) Pulse Width
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
MIR_PW
-
-
-
M_PW4 M_PW3
Reset Value
0
0
0
0
1
This 5-bit register sets MIR output pulse width.
Bit 2
M_PW2
0
Bit 1
M_PW1
1
Bit 0
M_PW0
0
M_PW4~0
00000
00001
00010
...
k₁₀
...
11111
MIR Pulse Width (1.152M bps)
0 ns
20.83 ns
41.66 (==20.83*2) ns
...
20.83*k₁₀ ns
...
645 ns
MIR Output Width (0.576M bps)
0 ns
41.66 ns
83.32 (==41.66*2) ns
...
41.66*k₁₀ ns
...
1290 ns
76
Publication Release Date: Apr. 2000
Revision 0.60