W83L517D Datasheet, PDF (82/138 Pages) Winbond – LPC SUPER I/O

W83L517D
5.8 Set6 - IR Physical Layer Control Registers
Version 0.6
Address Offset Register Name
Register Description
0
IR_CFG2
1
MIR_PW
2
SIR_PW
3
SSR
4
HIR_FNU
5
IR_ID1
6
IR_ID2
7
HIR_SL
Infrared Configure Register 2
MIR (1.152M bps or 0.576M bps) Pulse Width
SIR Pulse Width
Sets Select Register
High Speed Infrared Flag Number
IR ID Register 1
IR ID Register 2
High Speed infrared Select Register
5.8.1 Set6.Reg0 - Infrared Configure Register 2 (IR_CFG2)
This register controls ASK-IR, MIR, FIR operations.
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
IR_CFG2 SHMD_N SHDM_N FIR_CRC MIR_CRC -
Reset Value
0
0
1
0
0
Bit 2
Bit 1
INV_CRC DIS_CRC
0
0
Bit 0
-
0
Bit 7:
SHMD_N - ASK-IR Modulation Disable
SHMD_N
Modulation Mode
0
IRTX modulate 500K Hz Square Wave
1
Re-rout IRTX
Bit 6:
Bit 5:
Bit 4:
SHDM_N - ASK-IR Demodulation Disable
SHDM_N
Demodulation Mode
0
Demodulation 500K Hz
1
Re-rout IRRX
FIR_CRC - FIR (4M bps) CRC Type
FIR_CRC
CRC Type
0
16-bit CRC
1
32-bit CRC
Note that the 16/32-bit CRC are defined in IrDA 1.1 physical layer.
MIR_CRC - MIR (1.152M/0.576M bps) CRC Type
MIR_CRC
CRC Type
0
16-bit CRC
1
32-bit CRC
75
Publication Release Date: Apr. 2000
Revision 0.60