W83L517D Datasheet, PDF (113/138 Pages) Winbond – LPC SUPER I/O

W83L517D
Version 0.6
9.2.2 Extended Functions Enable Registers (EFERs)
After a power-on reset, the W83L517D enters the default operating mode. Before the W83L517D enters
the extended function mode, a specific value must be programmed into the Extended Function Enable
Register (EFER) so that the extended function register can be accessed. The Extended Function Enable
Registers are write-only registers. On a PC/AT system, their port addresses are 2Eh or 4Eh (as
described in previous section).
9.2.3 Extended Function Index Registers (EFIRs), Extended Function Data Registers(EFDRs)
After the extended function mode is entered, the Extended Function Index Register (EFIR) must be
loaded with an index value (02h, 07h-FEh) to access Configuration Register 0 (CR0), Configuration
Register 7 (CR07) to Configuration Register FE (CRFE), and so forth through the Extended Function
Data Register (EFDR). The EFIRs are write-only registers with port address 2Eh or 4Eh (as described in
section 12.2.1) on PC/AT systems; the EFDRs are read/write registers with port address 2Fh or 4Fh (as
described in section 9.2.1) on PC/AT systems.
9.3 Configuration Sequence
To program W83L517D configuration registers, the following configuration sequence must be followed:
(1). Enter the extended function mode
(2). Configure the configuration registers
(3). Exit the extended function mode
9.3.1 Terminology
I/F
: Interface.
Default : The default value of the register after power-on.
‘XXXXb’ : Indicates the value in binary notation.
‘XXXXh’ : Indicates the value in hexadecimal notation.
‘XsXXb’ : The ‘s’ indicates the bit value is setting by power-on strapping.
9.3.2 Enter the extended function mode
To place the chip into the extended function mode, two successive wrtites of 0x87 must be applied to
Extended Function Enable Registers (EFERs, i.e. 2Eh or 4Eh).
9.3.3 Configure the configuration registers
The chip selects the logical device and activates the desired logical devices through Extended Function
Index Register (EFIR) and Extended Function Data Register(EFDR). EFIR is located at the same
address as EFER, and EFDR is located at address (EFIR+1).
First, write the Logical Device Number (i.e.,0x07h) to the EFIR and then write the number of the desired
logical device to the EFDR. If accessing the Chip(Global) Control Registers, this step is not required.
Secondly, write the address of the desired configuration register within the logical device to the EFIR and
then write (or read) the desired configuration register through EFDR.
9.3.4 Exit the extended function mode
To exit the extended function mode, one write of 0xAAh to EFER is required. Once the chip exits the
extended function mode, it is in the normal running mode and is ready to enter the configuration mode.
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Publication Release Date: Apr. 2000
Revision 0.60