W83L517D Datasheet, PDF (56/138 Pages) Winbond – LPC SUPER I/O

W83L517D
4.2.9 User-defined Register (UDR) (Read/Write)
This is a temporary register that can be accessed and defined by the user.
TABLE 4-5 BAUD RATE TABLE
Version 0.6
BAUD RATE From different Pre-divider
Pre-Div: 13 Pre-Div:1.625 Pre-Div: 1.0
1.8461M Hz 14.769M Hz 24M Hz
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
57600
115200
400
600
880
1076
1200
2400
4800
9600
14400
16000
19200
28800
38400
57600
76800
153600
307200
460800
921600
650
975
1430
1478.5
1950
3900
7800
15600
23400
26000
31200
46800
62400
93600
124800
249600
499200
748800
1497600
Decimal divisor used Error Percentage between
to generate 16X desired and actual
clock
2304
**
1536
**
1047
0.18%
857
0.099%
768
**
384
**
192
**
96
**
64
**
58
0.53%
48
**
32
**
24
**
16
**
12
**
6
**
3
**
2
**
1
**
** The percentage error for all baud rates, except where indicated otherwise, is 0.16%.
Note. Pre-Divisor is determined by CRF0 of UART A
49
Publication Release Date: Apr. 2000
Revision 0.60