W83L517D Datasheet, PDF (45/138 Pages) Winbond – LPC SUPER I/O

W83L517D
Version 0.6
3.2.8 Digital Input Register (DI Register) (Read base address + 7)
The Digital Input Register is an 8-bit read-only register used for diagnostic purposes. In a PC/XT or AT
only Bit 7 is checked by the BIOS. When the register is read, Bit 7 shows the complement of DSKCHG#,
while other bits of the data bus remain in tri-state. Bit definitions are as follows:
76 54321 0
xxxxxx x
x ^{Reserved for the hard disk controller}
During a read of this register, these bits are in tri-state
DSKCHG
In the PS/2 mode, the bit definitions are as follows:
76 5 43 21 0
11 1 1
HIGH DENS
DRATE0
DRATE1
DSKCHG
DSKCHG (Bit 7):
This bit indicates the complement of the DSKCHG# input.
Bit 6-3: These bits are always a logic 1 during a read.
DRATE1 DRATE0 (Bit 2, 1):
These two bits select the data rate of the FDC. Refer to the DR register bits 1 and 0 for the settings
corresponding to the individual data rates.
HIGH DENS# (Bit 0):
0 500 KB/S or 1 MB/S data rate (high density FDD)
1 250 KB/S or 300 KB/S data rate
In the PS/2 Model 30 mode, the bit definitions are as follows:
765 43 21 0
000
DRATE0
DRATE1
NOPREC
DMAEN
DSKCHG
38
Publication Release Date: Apr. 2000
Revision 0.60