W83L517D Datasheet, PDF (75/138 Pages) Winbond – LPC SUPER I/O

5.4.5 Reg6 - Transmitter FIFO Depth (TXFDTH) (Read Only)
Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Advanced IR
0
Reset Value
0
0
TXFD5 TXFD4 TXFD3
0
0
0
0
Bit 2
TXFD2
0
W83L517D
Version 0.6
Bit 1
TXFD1
0
Bit 0
TXFD1
0
Bit 7~6: Reserved, Read 0.
Bit 5~0:
Reading these bits returns the current transmitter FIFO depth, that is, the number of
bytes left in the transmitter FIFO.
5.4.6 Reg7 - Receiver FIFO Depth (RXFDTH) (Read Only)
Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Advanced IR
0
Reset Value
0
0
RXFD5 RXFD4 RXFD3
0
0
0
0
Bit 2
RXFD2
0
Bit 1
RXFD1
0
Bit 0
RXFD1
0
Bit 7~6:
Bit 5~0:
Reserved, Read 0.
Reading these bits returns the current receiver FIFO depth, that is, the number of bytes
left in the receiver FIFO.
5.5 Set3 - Version ID and Mapped Control Registers
Address Offset Register Name
Register Description
0
AUID
1
MP_UCR
2
MP_UFR
3
SSR
4
Reversed
5
Reserved
6
Reserved
7
Reserved
Advanced IR ID
Mapped IR Control Register
Mapped IR FIFO Control Register
Sets Select Register
-
-
-
-
5.5.1 Reg0 - Advanced IR ID (AUID)
This register is read only. It stores advanced IR version ID. Reading it returns 1XH.
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
SSR
SSR7
Default Value
0
SSR6
0
SSR5
0
SSR4
1
SSR3
X
SSR2
X
Bit 1
SRR1
X
Bit 0
SRR0
X
68
Publication Release Date: Apr. 2000
Revision 0.60