W83L517D Datasheet, PDF (112/138 Pages) Winbond – LPC SUPER I/O

9. CONFIGURATION REGISTER
W83L517D
Version 0.6
9.1 Plug and Play Configuration
The W83L517D uses Compatible PNP protocol to access configuration registers for setting up different
types of configurations. In W83L517D, there are eleven Logical Devices (from Logical Device 0 to
Logical Device B with the exception of logical device 4 for backward compatibility) which correspond to
eleven individual functions: FDC (logical device 0), PRT (logical device 1), UART1 (logical device 2),
FIR (Fast IR, logical device 6), GPIO1 (logical device 7), GPIO2(logical device 8),GPIO3
~GPIO5(logical device 9), and ACPI ((logical device A). Each Logical Device has its own configuration
registers (above CR30). Host can access those registers by writing an appropriate logical device number
into logical device select register at CR07.
9.2 Compatible PnP
9.2.1 Extended Function Registers
In Compatible PnP, there are two ways to enter Extended Function and read or write the configuration
registers. HEFRAS (CR26 bit 6) can be used to select one out of these two methods of entering the
Extended Function mode as follows:
HEFRAS
0
1
address and value
write 87h to the location 2Eh twice
write 87h to the location 4Eh twice
After Power-on reset, the value on RTSA# (pin 49) is latched by HEFRAS of CR26. In Compatible PnP,
a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port address
2Eh or 4Eh). Secondly, an index value (02h, 07h-FFh) must be written to the Extended Functions Index
Register (I/O port address 2Eh or 4Eh same as Extended Functions Enable Register) to identify which
configuration register is to be accessed. The designer can then access the desired configuration register
through the Extended Functions Data Register (I/O port address 2Fh or 4Fh).
After programming of the configuration register is finished, an additional value (AAh) should be written to
EFERs to exit the Extended Function mode to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin MR
= 1). A warm reset will not affect the configuration registers.
105
Publication Release Date: Apr. 2000
Revision 0.60