W83L517D Datasheet, PDF (51/138 Pages) Winbond – LPC SUPER I/O

W83L517D
Version 0.6
4.2.3 Handshake Control Register (HCR) (Read/Write)
This register controls the pins of the UART used for handshaking peripherals such as modem, and
controls the diagnostic mode of the UART.
7 6 5 4 32 10
00 0
Data terminal ready (DTR)
Request to send (RTS)
Loopback RI input
IRQ enable
Internal loopback enable
Bit 4: When this bit is set to a logical 1, the UART enters diagnostic mode by an internal loopback, as
follows:
(1) SOUT is forced to logical 1, and SIN is isolated from the communication link instead of the
TSR.
(2) Modem output pins are set to their inactive state.
(3) Modem input pins are isolated from the communication link and connect internally as DTR (bit
0 of HCR) → DSR, RTS ( bit 1 of HCR) → CTS, Loop-back RI input ( bit 2 of HCR) → RI and
IRQ enable ( bit 3 of HCR) → DCD .
Aside from the above connections, the UART operates normally. This method allows the CPU to
test the UART in a convenient way.
Bit 3: The UART interrupt output is enabled by setting this bit to be logic 1. In the diagnostic mode this bit
is internally connected to the modem control input DCD .
Bit 2: This bit is used only in the diagnostic mode. In the diagnostic mode this bit is internally connected
to the modem control input RI .
Bit 1: This bit controls the RTS output. The value of this bit is inverted and output to RTS .
Bit 0: This bit controls the DTR output. The value of this bit is inverted and output to DTR .
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Publication Release Date: Apr. 2000
Revision 0.60