W83L517D Datasheet, PDF (73/138 Pages) Winbond – LPC SUPER I/O

W83L517D
Version 0.6
Advanced IR DIS_BACK
-
PR_DIV1 PR_DIV0 RX_FSZ1 RX_FSZ0 TX_FSZ1 TXFSZ0
Reset Value
0
0
0
0
0
0
0
0
Bit 7:
Bit 6:
Bit 5, 4:
DIS_BACK - Disable Backward Operation
A write to 1 disables backward legacy IR mode. When operating in legacy SIR/ASK-IR mode, this
bit should be set to 1 to avoid backward operation.
Reserved, write 0.
PR_DIV1~0 - Pre-Divisor 1~0.
These bits select pre-divisor for external input clock 24M Hz. The clock goes through the pre-
divisor, then input to baud rate divisor of IR.
PR_DIV1~0
Pre-divisor
Max. Baud Rate
00
13.0
115.2K bps
01
1.625
921.6K bps
10
6.5
230.4K bps
11
1
1.5M bps
Bit 3, 2:
RX_FSZ1~0 - Receiver FIFO Size 1~0
These bits setup receiver FIFO size when FIFO is enable.
RX_FSZ1~0
RX FIFO Size
00
16-Byte
01
32-Byte
1X
Reserved
Bit 1, 0:
TX_FSZ1~0 - Transmitter FIFO Size 1~0
These bits setup transmitter FIFO size when FIFO is enable.
TX_FSZ1~0
TX FIFO Size
00
16-Byte
01
32-Byte
1X
Reserved
66
Publication Release Date: Apr. 2000
Revision 0.60