W83L517D Datasheet, PDF (123/138 Pages) Winbond – LPC SUPER I/O

TABLE B
DTYPE0
0
DTYPE1
0
DRVDEN0(pin 2)
SELDEN
0
1
1
0
1
1
DRATE1
SELDEN
DRATE0
W83L517D
Version 0.6
DRVDEN1(pin 3)
DRATE0
DRATE0
DRATE0
DRATE1
DRIVE TYPE
4/2/1 MB 3.5”“
2/1 MB 5.25”
2/1.6/1 MB 3.5” (3-MODE)
9.6 Logical Device 1 (Parallel Port)
CR30 (Default 0x01 if PNPCSV = 0 during POR, 0x00h otherwise)
Bit 7 - 1: Reserved.
Bit 0:
= 1 Activates the logical device.
= 0 Logical device is inactive.
CR60, CR 61 (Default 0x03h, 0x78h if PNPCSV = 0 during POR, default 0x00h, 0x00h otherwise)
These two registers select Parallel Port I/O base address.
[0x100h: 0xFFCh] on 4 byte boundary (EPP not supported) or
[0x100h: 0xFF8h] on 8 byte boundary (all modes supported, EPP is only available when the base
address is on 8 byte boundary).
CR70 (Default 0x07h if PNPCSV = 0 during POR, 0x00h otherwise)
Bit 7 - 4: Reserved.
Bit [3:0]: These bits select IRQ resource for Parallel Port.
CR74 (Default 0x04h)
Bit 7 - 3: Reserved.
Bit 2 - 0: These bits select DRQ resource for Parallel Port.
0x00h = DMA0
0x01h = DMA1
0x02h = DMA2
0x03h = DMA3
0x04h - 0x07h = No DMA active
116
Publication Release Date: Apr. 2000
Revision 0.60