W83L517D Datasheet, PDF (21/138 Pages) Winbond – LPC SUPER I/O

1.5 KBC and FLASH ROM Interface (Conts’)
SYMBOL
MEMR#
(GP12)
MEMW#
(GP13)
ROMCS#
(GP14)
PIN I/O
FUNCTION
67
O12t
Flash ROM interface Memory Read Enable
I/O12t ^{General purpose I/O PORT 1 ,}
68
O12t
Flash ROM interface Memory Write Enable
I/O12t ^{General purpose I/O PORT 1 ,}
69
OD12 Flash ROM interface Chip Select
I/OD12 ^{General purpose I/O PORT 1 ,}
W83L517D
Version 0.6
(PENROM#)
IN_t
XA0
(GP15)
XA1
(GP26)
XA2
(GP27)
XA3-XA10
(GP40-
GP47)
XA11-XA18
(GP50-
GP57)
70
71
72
73-80
O
I/O_12t
O
I/O_12t
O
I/O_12t
O
I/O_12t
81-84
86-89
O
I/O_12t
During power-on reset , this pin is pulled down internally and is
defined as PENROM# and decoded memory address of BIOS
to output selected signal, which provides the power on value
for CR24 bit 1. A 4.7kΩ is recommended if intends to pull up
and disable BIOS ROM function .
Flash ROM interface Address 0.
General purpose I/O PORT 1 ,
Flash ROM interface Address 1.
General purpose I/O PORT 2 ,
Flash ROM interface Address 2.
General purpose I/O PORT 2 ,
Flash ROM interface Address [3:10].
General purpose I/O PORT 4 ,
Flash ROM interface Address [11:18].
General purpose I/O PORT 5 ,
1.6 POWER PINS
SYMBOL
VCC3V
PIN
15, 51
VCC
GND
40, 90
10, 35, 61, 85
FUNCTION
+3.3V power supply for core logic and driving 3V on host
interface.
+5V or +3.3V power supply for device output pad.
Ground.
14
Publication Release Date: Apr. 2000
Revision 0.60