W83L517D Datasheet, PDF (116/138 Pages) Winbond – LPC SUPER I/O

W83L517D
= 1 Disable.
Version 0.6
Bit 0: IPD (Immediate Power Down). When set to 1, it will put the whole chip into power down
mode immediately.
CR24 (Default ss00,00ssb)
Bit 7 : Keyboard address decoder control
= 0 Enable keyboard address (interface: KBCS# and MCCS#) decoder and IRQ1 , IRQ12
pass to SERIRQ.
= 1 Disable keyboard interface.
The corresponding power-on setting pin is PENKBC# (pin 52)
Bit 6: CLKSEL(Enable 48Mhz)
= 0 The clock input on Pin 1 should be 24 MHz.
= 1 The clock input on Pin 1 should be 48 MHz.
The corresponding power-on setting pin is PEN48 (pin 61).
Bit[5:4]: ROM size select
= 00 1Mb
01 2Mb
10 4Mb
11 Reserved
Bit3:MEMW# Select (PIN97)
= 0 MEMW# of flash interface is Disabled.
= 1 MEMW# of flash interface is Enabled.
Bit2: Reserved.
Bit1 : Enable Flash ROM Interface
= 0 Flash ROM Interface is enabled after hardware reset
= 1 Flash ROM Interface is disabled after hardware reset
This bit is read only, and set/reset by power-on setting pin. The corresponding power-on
setting pin is PENROM#(pin 69)
Bit 0: PNPCSV
= 0 The Compatible PnP address select registers have default values.
= 1 The Compatible PnP address select registers have no default value.
The corresponding power-on setting pin is PNPCSV# (pin 43).
CR25 (Default 0x00h)
Bit 7 ~ 4: Reserved
Bit 3: FIRTRI
When write to “1” ,FIR interface is set to tri-state and reduce the power consumption of chip.
Bit 2: URATRI
When write to “1”, UART interface is set to tri-state and reduce the power consumption of chip.
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Publication Release Date: Apr. 2000
Revision 0.60