W83L517D Datasheet, PDF (119/138 Pages) Winbond – LPC SUPER I/O

Bit 1 : (PIN 71 ~72)
= 0 GPIO 2X
= 1 or CR24 bit7 =0 the Pin 71 ~ 72 is Flash I/F (XA1 ~ XA0)
Bit 0: (PIN 67 ~ 70 )
= 0 GPIO1X
= 1 Flash I/F( MEMR#, MEMW#, ROMCS#, XA0)
This bits is set to 1 if Pin 45 is set to 0 during RESET Period.
W83L517D
Version 0.6
CR2B (POWER DOWN CONTROL
Default s000,0000b)
Bit 7 :
= 0 Normal operation
= 1 Enable Power down mode (Active with
bit[2..0] are all set to “1”)
Bit 6 –3 : Reserved
Bit 2 : Enable Flash interface Power-down
= 0 Normal operation
= 1 Flash interface is in power-down mode if CR2B bit 7 =1 or PDCTL# = 0)
Bit 1 : Enable SERIRQ interface Power-down
= 0 Normal operation
= 1 SERIRQ interface is in power-down mode if CR2B bit 7 =1 or PDCTL# = 0)
Bit 0 : Enable FDC,UR, FIR ,PRT interface Power-down
= 0 Normal operation
= 1 FDC, UR, FIR, PRT interface is in power-down mode if CR2B bit 7 =1 or PDCTL# = 0
CR2C , CR2D , CR2E FOR WINBOND TEST Reserved.
CR2C (Default 0x10h)
bit 7 – 5 : Reserved
bit 4-0 : Fresh interface Cycle time control .
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Publication Release Date: Apr. 2000
Revision 0.60