W83L517D Datasheet, PDF (60/138 Pages) Winbond – LPC SUPER I/O

Legacy IR Mode:
W83L517D
Version 0.6
Bit 4:
Not used. A read will return 0.
MIR, FIR, Remote IR:
EDMAI - Enable DMA Interrupt.
A write to 1 will enable DMA interrupt.
Bit 3: Reserved. A read will return 0.
Bit 2:
Legacy IR Mode:
EUSRI - Enable USR (IR Status Register) Interrupt
A write to 1 will enable IR status register interrupt.
Advanced SIR/ASK-IR:
EUSRI - Enable USR (IR Status Register) Interrupt
A write to 1 will enable IR status register interrupt.
MIR, FIR, Remote Controller:
EHSRI/ETXURI - Enable USR Interrupt or Enable Transmitter Underrun Interrupt
A write to 1 will enable USR interrupt or enable transmitter underrun interrupt.
Bit 1:
ETBREI - Enable TBR (Transmitter Buffer Register) Empty Interrupt
A write to 1 will enable the transmitter buffer register empty interrupt.
Bit 0:
ERBRI - Enable RBR (Receiver Buffer Register) Interrupt
A write to 1 will enable receiver buffer register interrupt.
5.2.3 Set0.Reg2 - Interrupt Status Register/IR FIFO Control Register (ISR/UFR)
Interrupt Status Register (Read Only)
Mode
B7
B6
B5
B4 B3 B2
B1
B0
Legacy IR FIFO Enable FIFO Enable 0
0
IID2 IID1
IID0
IP
Advanced TMR_I
IR
FSF_I
TXTH_I DMA_I HS_I USR_I/ TXEMP_I RXTH_I
FEND_I
Reset Value ₀
0
1
0
0
0
1
0
Legacy IR:
This register reflects the Legacy IR interrupt status, which is encoded by different interrupt sources into 3
bits.
53
Publication Release Date: Apr. 2000
Revision 0.60