W83L517D Datasheet, PDF (124/138 Pages) Winbond – LPC SUPER I/O

CRF0 (Default 0x3Fh)
Bit 7: Reserved.
Bit 6 - 3: ECP FIFO Threshold.
Bit 2 - 0: Parallel Port Mode (CR28 PRTMODS2 = 0)
= 100b Printer Mode (Default)
= 000b Standard and Bi-direction (SPP) mode
= 001b EPP - 1.9 and SPP mode
= 101b EPP - 1.7 and SPP mode
= 010b ECP mode
= 011b ECP and EPP - 1.9 mode
= 111b ECP and EPP - 1.7 mode.
W83L517D
Version 0.6
9.7 Logical Device 2 (UART A)
CR30 (Default 0x01h if PNPCSV = 0 during POR, 0x00h otherwise)
Bit 7 - 1: Reserved.
Bit 0: = 1 Activates the logical device.
= 0 Logical device is inactive.
CR60, CR 61 (Default 0x03h, 0xF8h if PNPCSV = 0 during POR, 0x00h, 0x00h otherwise)
These two registers select Serial Port 1 I/O base address [0x100h:0xFF8h] on 8 byte boundary.
CR70 (Default 0x04h if PNPCSV = 0 during POR, 0x00h otherwise)
Bit 7 - 4: Reserved.
Bit 3 - 0: These bits select IRQ resource for Serial Port 1.
CRF0 (Default 0x00h)
Bit 7 - 2: Reserved.
Bit 1 - 0: SUACLKB1, SUACLKB0
= 00b UART A clock source is 1.8462 Mhz (24MHz/13)
= 01b UART A clock source is 2 Mhz (24MHz/12)
= 10b UART A clock source is 24 Mhz (24MHz/1)
= 11b UART A clock source is 14.769 Mhz (24mhz/1.625)
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Publication Release Date: Apr. 2000
Revision 0.60