W83L517D Datasheet, PDF (114/138 Pages) Winbond – LPC SUPER I/O

W83L517D
Version 0.6
9.3.5 Software programming example
The following example is written in Intel 8086 assembly language. It assumes that the EFER is located at
2Eh, so EFIR is located at 2Eh and EFDR is located at 2Fh. If HEFRAS (CR26 bit 6) is set, 4Eh can be
directly replaced by 4Eh and 2Fh replaced by 4Fh.
;-----------------------------------------------------------------------------------
; Enter the extended function mode ,interruptible double-write |
;-----------------------------------------------------------------------------------
MOV DX,2EH
MOV AL,87H
OUT DX,AL
OUT DX,AL
;-----------------------------------------------------------------------------
; Configure logical device 1, configuration register CRF0 |
;-----------------------------------------------------------------------------
MOV DX,2EH
MOV AL,07H
OUT DX,AL
; point to Logical Device Number Reg.
MOV DX,2FH
MOV AL,01H
OUT DX,AL
; select logical device 1
;
MOV DX,2EH
MOV AL,F0H
OUT DX,AL
; select CRF0
MOV DX,2FH
MOV AL,3CH
OUT DX,AL
; update CRF0 with value 3CH
;------------------------------------------
; Exit extended function mode |
;------------------------------------------
MOV DX,2EH
MOV AL,AAH
OUT DX,AL
9.4 Chip (Global) Control Register
CR02 (Default 0x00h)
Bit 7 - 1: Reserved.
Bit 0: SWRST --> Soft Reset.
CR07
The register is used to switch each logical device when write the number of logical device to EFDRs.
Bit 7 - 0: LDNB7 - LDNB0 --> Logical Device Number Bit 7 - 0
CR20 (Default 0x61h)
Bit 7 - 0: DEVIDB7 - DEBIDB0 --> Device ID Bit 7 - Bit 0 = 0x 61 (read only).
CR21 (Default 0x0X)
Bit 7 - 0: DEVREVB7 - DEBREVB0 --> Device Rev = 0x 0X (read only).
X : Version change number .(Bit 3~0).
107
Publication Release Date: Apr. 2000
Revision 0.60