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LM3S5G31 Datasheet, PDF (968/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller
Analog Comparators
Table 19-3. Internal Reference Voltage and ACREFCTL Field Values (continued)
ACREFCTL Register
EN Bit
Value
RNG Bit Value Output Reference Voltage Based on VREF Field Value
RNG=0 Total resistance in ladder is 31 R.
VIREF = VDDA × RVREF
EN=1
RNG=1
TTohteVVVVVVVVVVVVVVVVVVVVVVVVVVValrIIIIIIIIIIIIIIIIIIIIIIIIIIIarRRRRRRRRRRRRRRRRRRRRRRRRRRRenEEEEEEEEEEEEsEEEEEEEEEEEEEEEgiFFFFFFFFFFFFFFFFFFFFFFFFFFFsetaonf===========================cineteVVVVVVVVVVVVVVVVVVVVVV000000000inrnDDDDDDDDDDDDDDDDDDDDDD.........laaDDDDDDDDDDDDDDDDDDDDDD888888111ldAAAAAAAAAAAAAAAAAAAAAArd444555555eef××××××××××××××××××××××e333r r++++++iseVVVVVRRRRRRRRRRR((((((×××n2VVVVVVc000000RRRRR3VVVVVVVVVVVRRRRRRRRRR2222eRRRRRRVVVRRRRRRRRRRR......REEEEETTTTTTTTTTTT3333iEEEEEEEEEEEEEEEEEnRRR.111111FFFFFFFFFFFFFFFF333333FFFFFFtEEEh000000111111iFFFs666666++++++mo××××××888888deVVVVVV))))))isRRRRRR0EEEEEE.8FFFFFF5-2.448 V.
VIREF = V0D.D1A4×3 V×R2VE3RFEF
VIREF = 0.143 ×2V3REF
VIREF = 0.143 × VREF
19.4
The range of internal reference for this mode is 0-2.152 V.
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator clock by writing a value of 0x0010.0000 to the RCGC1 register
in the System Control module (see page 264).
2. Enable the clock to the appropriate GPIO modules via the RCGC2 register (see page 273). To
find out which GPIO ports to enable, refer to Table 23-5 on page 1105.
3. In the GPIO module, enable the GPIO port/pin associated with the input signals as GPIO inputs.
To determine which GPIO to configure, see Table 23-4 on page 1097.
4. Configure the PMCn fields in the GPIOPCTL register to assign the analog comparator output
signals to the appropriate pins (see page 460 and Table 23-5 on page 1105).
968
July 03, 2014
Texas Instruments-Production Data