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LM3S5G31 Datasheet, PDF (1129/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller
Stellaris® LM3S5G31 Microcontroller
Table 23-8. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Typea Description
Assignment
VDD
K7
fixed
-
Power Positive supply for I/O and some logic.
G12
K8
K9
H10
G10
E10
G11
VDDA
C7
fixed
-
Power The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 25-2 on page 1145 , regardless
of system implementation.
VDDC
D3
fixed
C3
-
Power Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 25-6 on page 1150 .
VREFA
A7
PB6
I
Analog This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 4095. The VREFA
input is limited to the range specified in Table
25-27 on page 1163 .
WAKE
M10
fixed
I
TTL
An external input that brings the processor out of
Hibernate mode when asserted.
XOSC0
K11
fixed
I
Analog Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
XOSC1
K12
fixed
O
Analog Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
July 03, 2014
Texas Instruments-Production Data
1129