LM3S5G31 Datasheet, PDF (116/1223 Pages) Texas Instruments – Stellaris LM3S5G31 Microcontroller

Cortex-M3 Peripherals
Table 3-7. Peripherals Register Map (continued)
Offset Name
Type
Reset
Description
0xDA4 MPUBASE1
0xDA8 MPUATTR1
0xDAC MPUBASE2
0xDB0 MPUATTR2
0xDB4 MPUBASE3
0xDB8 MPUATTR3
R/W
0x0000.0000 MPU Region Base Address Alias 1
R/W
0x0000.0000 MPU Region Attribute and Size Alias 1
R/W
0x0000.0000 MPU Region Base Address Alias 2
R/W
0x0000.0000 MPU Region Attribute and Size Alias 2
R/W
0x0000.0000 MPU Region Base Address Alias 3
R/W
0x0000.0000 MPU Region Attribute and Size Alias 3
See
page
167
169
167
169
167
169
3.3 System Timer (SysTick) Register Descriptions
This section lists and describes the System Timer registers, in numerical order by address offset.
116
July 03, 2014
Texas Instruments-Production Data